Freescale Semiconductor /MKV58F24 /PWM1 /SM0OCTRL

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Interpret as SM0OCTRL

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)PWMXFS 0 (00)PWMBFS 0 (00)PWMAFS 0 (0)POLX 0 (0)POLB 0 (0)POLA 0 (PWMX_IN)PWMX_IN 0 (PWMB_IN)PWMB_IN 0 (PWMA_IN)PWMA_IN

POLB=0, POLA=0, PWMXFS=00, PWMAFS=00, PWMBFS=00, POLX=0

Description

Output Control Register

Fields

PWMXFS

PWM_X Fault State

0 (00): Output is forced to logic 0 state prior to consideration of output polarity control.

1 (01): Output is forced to logic 1 state prior to consideration of output polarity control.

2 (10): Output is tristated.

3 (11): Output is tristated.

PWMBFS

PWM_B Fault State

0 (00): Output is forced to logic 0 state prior to consideration of output polarity control.

1 (01): Output is forced to logic 1 state prior to consideration of output polarity control.

2 (10): Output is tristated.

3 (11): Output is tristated.

PWMAFS

PWM_A Fault State

0 (00): Output is forced to logic 0 state prior to consideration of output polarity control.

1 (01): Output is forced to logic 1 state prior to consideration of output polarity control.

2 (10): Output is tristated.

3 (11): Output is tristated.

POLX

PWM_X Output Polarity

0 (0): PWM_X output not inverted. A high level on the PWM_X pin represents the “on” or “active” state.

1 (1): PWM_X output inverted. A low level on the PWM_X pin represents the “on” or “active” state.

POLB

PWM_B Output Polarity

0 (0): PWM_B output not inverted. A high level on the PWM_B pin represents the “on” or “active” state.

1 (1): PWM_B output inverted. A low level on the PWM_B pin represents the “on” or “active” state.

POLA

PWM_A Output Polarity

0 (0): PWM_A output not inverted. A high level on the PWM_A pin represents the “on” or “active” state.

1 (1): PWM_A output inverted. A low level on the PWM_A pin represents the “on” or “active” state.

PWMX_IN

PWM_X Input

PWMB_IN

PWM_B Input

PWMA_IN

PWM_A Input

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